This invention relates generally to semiconductor memory devices and more particularly to a two bit flash memory device.
Semiconductor based memory devices largely comprise Random Access Memories (RAM) and Read Only Memories (ROM). RAM is referred to as volatile memory, in that when supply voltage is removed, data is destroyed with the passage of time. ROM devices, including Programmable ROM (PROM), Erasable PROM (EPROM), and Electrically EPROM (EEPROM). Numerous EEPROM cells and flash memory cells can be simultaneously erased, and are characterized by a stacked gate structure comprising a floating gate and a control gate.
Flash memory cells can be grouped into NAND type and NOR type circuits. NAND flash memory cells have n cell transistors connected in series and are connected in parallel between bit lines and ground lines. NAND flash memory cells are useful in large scale integration. NOR flash memory cells include cell transistors that are connected in parallel between bit lines and ground lines. NOR flash memory cells provide high-speed operation.
Conventional flash memory cells operate as follows. A cell is programmed by applying a relatively high voltage (Vg), for example 12 volts, to a control gate and a moderately high voltage (Vd), for example 9 volts, is applied to the drain in order to produce "hot electrons", that is high energy electrons, in the channel near the drain. The hot electrons accelerate across the tunnel oxide and into the floating gate. The hot electrons are trapped in the floating gate that is surrounded by an insulator. A gate is a "floating gate" when it is located between a control gate and a substrate, and is not connected to a wordline, bitline, or other line. The insulators can include the interpoly dielectric and the tunnel oxide. The trapped electrons cause the threshold voltage of the cell to increase by approximately 3 to 5 volts. The cell is programmed by this change in the threshold voltage and the channel conductance of the cell created by the trapped electrons. The floating gate can hold its charge almost indefinitely, even after power is turned off to the memory cell. Such a memory cell is called "nonvolatile". The memory cell can be a flash EEPROM, and EEPROM, or other programmable nonvolatile memory.
The memory cell is read by applying a predetermined voltage (Vg) to the control gate. Vg is greater than the threshold voltage of an unprogrammed cell and less than the threshold voltage of a programmed cell. If the cell conducts, then the cell has not been programmed. The cell is said to be at a first lower logic state, for example "zero". Likewise, if the cell does not conduct, then the cell has been programmed. The cell is at a second higher logic state, for example "one".
The flash memory cell is erased by applying a relatively high voltage (Vs), for example 12 volts, to the source, ground (Vg=0) is applied to the control gate, and the drain floats. A strong electric field is developed across the tunnel oxide between the floating gate and the source region. Some electrons are trapped in the floating gate flow toward the portion of the floating gate overlying the source region and are extracted from the floating gate and into the source region by way of tunneling through the tunnel oxide. The electrons are removed from the floating gate, and the cell is erased.
The memory cell is activated by applying a voltage to the control gate. When the control gate is coupled to a voltage level, the two bit memory cell is enabled. The memory cell is in a non-conducting state when not enabled.